Add support for host target setting of support of features

Allow features to be added using env variable or cmake using standard
mechanism of "+v,+zfence" etc

doc/developer-guide.md

@@ -320,6 +320,14 @@ The builtin CMake options used when invoking CMake on the command line.
   caveats above apply, and this may result in an illegal instruction crash if
   your CPU doesn't support the generated instructions.
 
+- `CA_HOST_TARGET_<arch>_FEATURES`: This option is used by the `host` target to
+  enable features on a given CPU. `arch` should be a capitalized version of the
+  `host` target architecture e.g. `X86_64`, `RISCV64` or `AARCH64`. This should
+  be of the form of a comma separated list of features with either a '+' or '-'
+  preceding each feature to enable or disable e.g. "+v,-zfencei". This is
+  compatible with `--mattr` in `LLVM` tools such as `llc` or `opt`. The
+  environment variable `CA_HOST_TARGET_FEATURES` can also be used to enable or
+  disable features when debug is enabled.
 - `CA_USE_SPLIT_DWARF`: When building with gcc, enable split dwarf debuginfo.
   This significantly reduces binary size (especially when static linking) and
   speeds up the link step. Requires a non-ancient toolchain.

modules/compiler/targets/host/CMakeLists.txt

@@ -188,7 +188,13 @@ if(CA_HOST_CROSS_COMPILERS)
     target_compile_definitions(compiler-host PRIVATE
     CA_HOST_TARGET_${HOST_ARCH_UPPER}_CPU="${CA_HOST_TARGET_${HOST_ARCH_UPPER}_CPU}")
   endif()
-
+  ca_option(CA_HOST_TARGET_${HOST_ARCH_UPPER}_FEATURES STRING
+    "Feature list that host ${HOST_ARCH_UPPER} should enable or disable as a comma separated + or - list e.g. '+v,+zfh'" "")   
+  if(CA_HOST_TARGET_${HOST_ARCH_UPPER}_FEATURES)
+    message(STATUS "Features ${HOST_ARCH_UPPER} name ${CA_HOST_TARGET_${HOST_ARCH_UPPER}_FEATURES}")
+    target_compile_definitions(compiler-host PRIVATE
+    CA_HOST_TARGET_${HOST_ARCH_UPPER}_FEATURES="${CA_HOST_TARGET_${HOST_ARCH_UPPER}_FEATURES}")
+  endif()
   if(hostCrossCompilers)
     # Validate the user specified cross compiler list.
     foreach(CrossCompiler ${hostCrossCompilers})
@@ -225,11 +231,18 @@ if(CA_HOST_CROSS_COMPILERS)
         HOST_CROSS_DEVICE_NAME_${CROSS_COMPILER}="${crossDeviceName}")
         ca_option(CA_HOST_TARGET_${CROSS_COMPILER}_CPU STRING
         "Name of the CPU that host ${CROSS_COMPILER} should optimize for, or 'native'" "")  
-          if(CA_HOST_TARGET_${CROSS_COMPILER}_CPU)
-            message(STATUS "CPU ${CROSS_COMPILER} name ${CA_HOST_TARGET_${CROSS_COMPILER}_CPU}")
-            target_compile_definitions(compiler-host PRIVATE
-            CA_HOST_TARGET_${CROSS_COMPILER}_CPU="${CA_HOST_TARGET_${CROSS_COMPILER}_CPU}")
-          endif()
+        if(CA_HOST_TARGET_${CROSS_COMPILER}_CPU)
+          message(STATUS "CPU ${CROSS_COMPILER} name ${CA_HOST_TARGET_${CROSS_COMPILER}_CPU}")
+          target_compile_definitions(compiler-host PRIVATE
+          CA_HOST_TARGET_${CROSS_COMPILER}_CPU="${CA_HOST_TARGET_${CROSS_COMPILER}_CPU}")
+        endif()
+        ca_option(CA_HOST_TARGET_${CROSS_COMPILER}_FEATURES STRING
+          "Feature list that host ${HOST_ARCH_UPPER} should enable or disable as a comma separated + or - list e.g. '+v,+zfh'" "")  
+        if(CA_HOST_TARGET_${CROSS_COMPILER}_FEATURES)
+          message(STATUS "Features ${CROSS_COMPILER} name ${CA_HOST_TARGET_${CROSS_COMPILER}_FEATURES}")
+          target_compile_definitions(compiler-host PRIVATE
+          CA_HOST_TARGET_${CROSS_COMPILER}_FEATURES="${CA_HOST_TARGET_${CROSS_COMPILER}_FEATURES}")
+        endif()        
     endforeach()
   endif()
 endif()

modules/compiler/targets/host/source/target.cpp

@@ -33,6 +33,7 @@
 #include <llvm/Support/raw_ostream.h>
 #include <llvm/Target/TargetMachine.h>
 #include <llvm/Target/TargetOptions.h>
+#include <llvm/TargetParser/SubtargetFeature.h>
 #include <multi_llvm/multi_llvm.h>
 
 #if LLVM_VERSION_GREATER_EQUAL(18, 0)
@@ -102,6 +103,20 @@ static llvm::TargetMachine *createTargetMachine(llvm::Triple TT,
       /*JIT=*/true);
 }
 
+void UpdateFeatureMapFromString(llvm::StringMap<bool> &FeatureMap,
+                                llvm::StringRef FeatureString) {
+  const llvm::SubtargetFeatures Features(FeatureString);
+  for (const auto &Feature : Features.getFeatures()) {
+    if (llvm::SubtargetFeatures::hasFlag(Feature)) {
+      auto StrippedFeature = llvm::SubtargetFeatures::StripFlag(Feature);
+      FeatureMap[StrippedFeature] = llvm::SubtargetFeatures::isEnabled(Feature);
+    } else {
+      llvm::errs() << "Warning: '" << Feature
+                   << " should be of the form '+Feature' or '-Feature'\n";
+    }
+  }
+}
+
 HostTarget::HostTarget(const HostInfo *compiler_info,
                        compiler::Context *context,
                        compiler::NotifyCallbackFn callback)
@@ -293,6 +308,61 @@ compiler::Result HostTarget::initWithBuiltins(
       CPUName = CA_HOST_TARGET_RISCV64_CPU;
 #endif
     }
+  }
+
+#ifndef NDEBUG
+  if (const char *E = getenv("CA_HOST_TARGET_CPU")) {
+    CPUName = E;
+  }
+#endif
+
+  if (CPUName == "native") {
+    CPUName = llvm::sys::getHostCPUName();
+#if LLVM_VERSION_GREATER_EQUAL(19, 0)
+    FeatureMap = llvm::sys::getHostCPUFeatures();
+#else
+    FeatureMap.clear();
+    llvm::sys::getHostCPUFeatures(FeatureMap);
+#endif
+  }
+
+  std::string FeatureStr;
+
+  if (llvm::Triple::arm == triple.getArch()) {
+    FeatureMap["strict-align"] = true;
+    // We do not support denormals for single precision floating points, but we
+    // do for double precision. To support that we use neon (which is FTZ) for
+    // single precision floating points, and use the VFP with denormal support
+    // enabled for doubles. The neonfp feature enables the use of neon for
+    // single precision floating points.
+    FeatureMap["neonfp"] = true;
+    FeatureMap["neon"] = true;
+    // Hardware division instructions might not exist on all ARMv7 CPUs, but
+    // they probably exist on all the ones we might care about.
+    FeatureMap["hwdiv"] = true;
+    FeatureMap["hwdiv-arm"] = true;
+    if (host_device_info.half_capabilities) {
+      FeatureMap["fp16"] = true;
+    }
+#if defined(CA_HOST_TARGET_ARM_FEATURES)
+    FeatureStr = CA_HOST_TARGET_ARM_FEATURES;
+#endif
+  } else if (llvm::Triple::aarch64 == triple.getArch()) {
+#if defined(CA_HOST_TARGET_AARCH64_FEATURES)
+    FeatureStr = CA_HOST_TARGET_AARCH64_FEATURES;
+#endif
+  } else if (triple.isX86()) {
+    CPUName = "x86-64-v3";  // Default only, may be overridden below.
+    if (triple.isArch32Bit()) {
+#if defined(CA_HOST_TARGET_X86_FEATURES)
+      FeatureStr = CA_HOST_TARGET_X86_FEATURES;
+#endif
+    } else {
+#if defined(CA_HOST_TARGET_X86_64_FEATURES)
+      FeatureStr = CA_HOST_TARGET_X86_64_FEATURES;
+#endif
+    }
+  } else if (triple.isRISCV()) {
     // The following features are important for OpenCL, and generally constitute
     // a minimum requirement for non-embedded profile. Without these features,
     // we'd need compiler-rt support. Atomics are absolutely essential.
@@ -306,24 +376,26 @@ compiler::Result HostTarget::initWithBuiltins(
 #if defined(CA_HOST_ENABLE_FP16)
     FeatureMap["zfh"] = true;  // Half support
 #endif
+    if (triple.isArch32Bit()) {
+#if defined(CA_HOST_TARGET_RISCV32_FEATURES)
+      FeatureStr = CA_HOST_TARGET_RISCV32_FEATURES;
+#endif
+    } else {
+#if defined(CA_HOST_TARGET_RISCV64_FEATURES)
+      FeatureStr = CA_HOST_TARGET_RISCV64_FEATURES;
+#endif
+    }
   }
+  UpdateFeatureMapFromString(FeatureMap, FeatureStr);
 
 #ifndef NDEBUG
-  if (const char *E = getenv("CA_HOST_TARGET_CPU")) {
-    CPUName = E;
+  if (const char *E = getenv("CA_HOST_TARGET_FEATURES")) {
+    FeatureStr = E;
+    // Override features set above, either in cmake or default features
+    UpdateFeatureMapFromString(FeatureMap, FeatureStr);
   }
 #endif
 
-  if (CPUName == "native") {
-    CPUName = llvm::sys::getHostCPUName();
-#if LLVM_VERSION_GREATER_EQUAL(19, 0)
-    FeatureMap = llvm::sys::getHostCPUFeatures();
-#else
-    FeatureMap.clear();
-    llvm::sys::getHostCPUFeatures(FeatureMap);
-#endif
-  }
-
   if (compiler_info->supports_deferred_compilation) {
     llvm::orc::JITTargetMachineBuilder TMBuilder(triple);
     TMBuilder.setCPU(CPUName.str());