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arm: dts: Update coraz7s to match changes on the hdl. #2657
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Add IIC Controller and EEPROM to common dts, used to detect the evb if the EEPROM is available. If not, the at24.c driver fails to probe at the first test_byte due to NACKed transfer. Signed-off-by: Jorge Marques <[email protected]>
Update IIC Controller IRQ index and SPI Engine IRQ index. To sync with the changes on the HDL project. Signed-off-by: Jorge Marques <[email protected]>
Update IIC Controller IRQ index and RX DMA IRQ index. To sync with the changes on the HDL project. Signed-off-by: Jorge Marques <[email protected]>
The board development was canceled. See hdl/f5184b4e14bc61cd18dad7b5a648ea76e1f1ec5e Signed-off-by: Jorge Marques <[email protected]>
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I wonder if we should then add it to the common DT? To me is always odd to add a device that's not present just to have it failing probe... Following this approach could be dangerous (example with MMIO devices). For it to be in the common DT, I assume it's used in the vast majority of the projects? For the ones where's not used we could just delete the node from the top level DT...
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Hi, if /delete-node/
is an option I can add it to the necessary devicetrees and move the controller&eeprom to the dtsi.
But we need to clarify to which device: The IIC Controller or the EEPROM?
The IIC Controller needs to removed if not on the bitstream because r/w to the axi addr always causes a kernel panic.
Drivers on the I2C bus fail to probe gracefully.
At the HDL side, I kept the iic controller for the pulsar project even though no pulsar-evb has an eeprom; for this one in particular*, we can remove either the device or controller from the devicetree.
What do you prefer?
*zynq-coraz7s-ad7687-pmdz.dts,zynq-coraz7s-ad7689-ardz.dts,zynq-coraz7s-ad7946.dts,zynq-coraz7s-ad7984.dts,zynq-coraz7s-adaq4003.dts
I prefer the 4th option better or the current pr solution, but here are other ideas:
2th option (move to dtsi, keep pulsar unused):
devicetree HDL project Change
zynq-coraz7s-ad7687-pmdz.dts pulsar_adc None (already on dtsi)
zynq-coraz7s-ad7689-ardz.dts pulsar_adc None (already on dtsi)
zynq-coraz7s-ad7946.dts pulsar_adc None (already on dtsi)
zynq-coraz7s-ad7984.dts pulsar_adc None (already on dtsi)
zynq-coraz7s-adaq4003.dts pulsar_adc None (already on dtsi)
zynq-coraz7s-cn0501.dts - Removed
zynq-coraz7s-cn0540.dts cn0540 Remove IIC (already on dtsi); SPI IRQ
zynq-coraz7s-cn0579_i2c.dts cn0579 Remove IIC (already on dtsi); DMA IRQ
zynq-coraz7s.dts common None
zynq-coraz7s.dtsi - Added IIC with EEPROM at 0x50
3th option (move to dtsi, remove from pulsar:
devicetree HDL project Change
zynq-coraz7s-ad7687-pmdz.dts pulsar_adc Delete ICC (unused)
zynq-coraz7s-ad7689-ardz.dts pulsar_adc Delete ICC (unused)
zynq-coraz7s-ad7946.dts pulsar_adc Delete ICC (unused)
zynq-coraz7s-ad7984.dts pulsar_adc Delete ICC (unused)
zynq-coraz7s-adaq4003.dts pulsar_adc Delete ICC (unused)
zynq-coraz7s-cn0501.dts - Removed
zynq-coraz7s-cn0540.dts cn0540 Remove IIC (already on dtsi); SPI IRQ
zynq-coraz7s-cn0579_i2c.dts cn0579 Remove IIC (already on dtsi); DMA IRQ
zynq-coraz7s.dts common None
zynq-coraz7s.dtsi - Added IIC with EEPROM at 0x50
Also, the EEPROM addresses are not consistent; and is a problem we already have with the zed projects.
And I'm using zynq-coraz7s.dts as zynq-zed-adv7511.dtsi, a fourth option is to create
zynq-coraz7s-iic.dtsi and import that to other projects:
zynq-coraz7s-ad7687-pmdz.dts pulsar_adc None
zynq-coraz7s-ad7689-ardz.dts pulsar_adc None
zynq-coraz7s-ad7946.dts pulsar_adc None
zynq-coraz7s-ad7984.dts pulsar_adc None
zynq-coraz7s-adaq4003.dts pulsar_adc None
zynq-coraz7s-cn0501.dts - Removed
zynq-coraz7s-cn0540.dts cn0540 Remove IIC; SPI IRQ, import zynq-coraz7s-iic.dtsi
zynq-coraz7s-cn0579_i2c.dts cn0579 Remove IIC; DMA IRQ, import zynq-coraz7s-iic.dtsi
zynq-coraz7s.dts common None
zynq-coraz7s.dtsi - None
zynq-coraz7s-iic.dtsi - Created with IIC and EEPROM at 0x50
PR Description
Related to analogdevicesinc/hdl#1517
To allow automatic EVB detection with the CoraZ7S, an IIC Controller is added to pin ARD SCL SDA at of the CoraZ7S.
The projects shall remove the controller if it is unused, but they cannot reuse the pins for Active In High signal (out from the evb),
to avoid a short during the runtime with the common bitstream, prior to switching to the project bitstream.
Since some projects already had IIC Controller, and to normalize across projects the addresses and irq pins, the following changes are applied:
** Stopped checking after the first different value.
And to sync the changes to committed devicetrees, the following files were analyzed and modified:
Changes:
Notes:
Faq:
What is the expected behavior for the common project with and EVB without EEPROM?
This PR aims to sync the HDL changes with the merged to main devicetrees,
fixing the addresses and irq indexes.
PR Type
PR Checklist