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You adapted HSE_VALUE to match the development board's crystal. In hardware/system_stm32f4xx.c the PLL factors are set but they are hardcoded and not calculated from HSE_VALUE. The resulting system clock is around factor 3 lower than indented.
The easiest hack would be to change PLL_M to 8 but it's certainly not the cleanest solution.
The text was updated successfully, but these errors were encountered:
Good catch!
I think I've blindly used latest version of system_stm32f4xx.c in ST's STM32F4xx_StdPeriph_Driver_v1.6.1. Will find a better solution than hardcoding.
setting PLL_M to HSE_VALUE/1000000u also is an easy fix. But whole file seems not to be designed for variable crystal values anyways..
Thanks for your reply!
You adapted
HSE_VALUE
to match the development board's crystal. Inhardware/system_stm32f4xx.c
the PLL factors are set but they are hardcoded and not calculated fromHSE_VALUE
. The resulting system clock is around factor 3 lower than indented.The easiest hack would be to change
PLL_M
to 8 but it's certainly not the cleanest solution.The text was updated successfully, but these errors were encountered: