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Aligned ram0x overlays in Multicore Tests and Matter samples
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The cpuapp_ram0x_region has been changed in the global dtsi file in
Zephyr and we need to align all dts overlay entries to that change.

Signed-off-by: Arkadiusz Balys <[email protected]>
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ArekBalysNordic authored and Vge0rge committed Nov 26, 2024
1 parent 64004f2 commit 7cf5059
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Showing 3 changed files with 7 additions and 7 deletions.
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&cpuapp_ram0x_region{
status = "okay";
reg = <0x2f010000 DT_SIZE_K(512)>;
ranges = <0x0 0x2f010000 0x6e000>;
reg = <0x2f011000 DT_SIZE_K(516)>;
ranges = <0x0 0x2f011000 0x6e000>;
cpuapp_data: memory@1000 {
reg = <0x1000 DT_SIZE_K(508)>;
reg = <0x1000 DT_SIZE_K(512)>;
};
};
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*/

&cpuapp_ram0x_region {
reg = <0x2f010000 0x91000>;
ranges = <0x0 0x2f010000 0x91000>;
reg = <0x2f011000 0x91000>;
ranges = <0x0 0x2f011000 0x91000>;
};

&cpuapp_data {
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*/

&cpuapp_ram0x_region {
reg = <0x2f010000 0x21000>;
ranges = <0x0 0x2f010000 0x21000>;
reg = <0x2f011000 0x21000>;
ranges = <0x0 0x2f011000 0x21000>;
};

&cpuapp_data {
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