PIO shift register data transfer timing. #6
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I have only tested with a scope - and I do not think many are using this driver as there are currently no breakout boards out in the wild unless Phil has shipped some of the test boards he made. Do you have one or have you made your own? What kind of issues have you seen?
Great - can you make a PR? For now I'll test the current code with Phils board and my CNC machine simulator, I want to see if that would detect timing issues. |
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So I tried these changes on my milling machine this morning with the side set delays and the change to driver.c noted above. It is much better, I can jog in all directions now, but it appears that the machine is not getting consistent direction changes. I need to dig deeper to describe exactly what is missing, but as you run a program the x axis is missing direction changes and starts wandering off to one side. Also, I need to set the step invert on Y to get any movement at all on the X axis, which is clearly weird. This is even with the side-step delay set to maximum, so I don't think it is any kind of setup/hold problem. I think that the bit signals still aren't quite lining up correctly. I think it happens more when X and Y are moving together as I get an error 8 when homing if XY home together - the X axis doesn't pull pack correctly after the first search pass. But If I home the axes individually it is successful. I am going to switch to a different setup with a smaller machine (at my desk) and also take another board and set it up on a logic analyzer so that I can dig into this more and help understand exactly where things are going wrong, at the very least I want to understand if it is something specific to my board. |
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Just wondering if people have done much testing on the shift register code? Has anybody else run into any timing issues?
When I was testing my board in my 3 axis mill, I found that I was getting inconsistent steps. Digging a bit deeper I found that the setup/hold requirement of the 74HC595D might not always be met:
According to the datasheet, the HC595 needs the data clocked on the rising edge. PCB skew in this design is ~17 ps between clock and data so I do not believe it is a layout issue.
I added side-set delays to ensure that the clock and data are aligned correctly and slowed them down to ensure that the data transfer is robust. This should still allow for step rates around 300 KHz which is faster than most external drivers can handle. Since these delays are in the PIO they should not slow down the application.
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