sama5d27c_breakout.pro

update=Wed 05 Dec 2018 01:01:08 PM CET
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=
CopperLayerCount=4
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=0
MinTrackWidth=0.09999999999999999
MinViaDiameter=0.45
MinViaDrill=0.2
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.1
ViaDiameter1=0.45
ViaDrill1=0.2
dPairWidth1=0.1
dPairGap1=0.15
dPairViaGap1=0.25
SilkLineWidth=0.12
SilkTextSizeV=1
SilkTextSizeH=1
SilkTextSizeThickness=0.15
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.05
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0.05
SolderMaskMinWidth=0.25
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.In1.Cu]
Name=In1.Cu.GND
Type=1
[pcbnew/Layer.In2.Cu]
Name=In2.Cu.VDD
Type=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/1]
Name=Power
Clearance=0.1
TrackWidth=0.2
ViaDiameter=0.45
ViaDrill=0.2
uViaDiameter=0.3
uViaDrill=0.1
dPairWidth=0.1
dPairGap=0.15
dPairViaGap=0.25