Question about "waiting until SPI transfer complete"

[hmeijdam]

I am playing with SPI and a shift register to understand how the SPI mechanism actually works. I now want to make a low level SPI transmitter sketch to blink all sorts of led patterns and save that for the future as a SPI building block/example.

I was peeking in the SPI source code and am puzzled about the byte transfer function:

https://github.com/SpenceKonde/megaTinyCore/blob/master/megaavr/libraries/SPI/src/SPI.cpp#L353

byte SPIClass::transfer(uint8_t data) {
  /*
  * The following NOP introduces a small delay that can prevent the wait
  * loop from iterating when running at the maximum speed. This gives
  * about 10% more speed, even if it seems counter-intuitive. At lower
  * speeds it is unnoticed.
  */
  asm volatile("nop");

  SPI0.DATA = data;
  while ((SPI0.INTFLAGS & SPI_RXCIF_bm) == 0);  // wait for complete send
  return SPI0.DATA;                             // read data back
}

Why is it checking the SPI_RXCIF_bm (Receive Complete Interrupt Flag)?
I had expected the SPI_TXCIF (Transfer Complete Interrupt Flag) to be checked.

[edit] Or do I need to interpret it that you are not using SPI buffer mode but using SPI_RXCIF_bm to define the 7th bit position in the SPI Intflags register and in fact checking the Bit 7 – IF Interrupt Flag, for SPI Normal Mode?

[SpenceKonde]

Agree with your assessment - @MX682X ?

[MX682X]

I've never used SPI on this devices before, so no practical experience, but I know that SPI is a bi-directional interface - every bit that is clocked out is one bit that is clocked in and the same time - Data received and Data transmitted Interrupt flags are the same things on SPI.

[hmeijdam]

After failing to get it to work on an Attiny412 I moved to a 204 with more pins and got below SPI Host mode sketch for writing to a 74HC595D working. Now I want to find out why I failed on the 412.

/* Demo sketch to connect a 74HC595D 8-bit shift register to the hardware SPI of a modern ATTiny
 *  connect 8 leds (via resistors) to the Qa - Qh pins of the 74HC595D 
 *  connect 74HC595D pin 13 (Output Enable) to GND.
 *  One led will turn on and keep walking from left to right to left, 
 *  like the Cylons in the old Battlestar Galactica series.
 */

#define RESET_SHIFT_REGISTER PIN_PB0 //connect to 74HC595D pin 10 (reset) 
#define LATCH_SHIFT_REGISTER PIN_PA2 //connect to 74HC595D pin 12 (Latch clock)

void setup() {
  pinModeFast(RESET_SHIFT_REGISTER, OUTPUT);  // reset shift register pin
  pinModeFast(MOSI, OUTPUT);  // MOSI (core knows the pin, connect to 74HC595D pin 14 (data)
  pinModeFast(LATCH_SHIFT_REGISTER, OUTPUT);  // Latch
  pinModeFast(SCK, OUTPUT); // SCK (core knows the pin, connect to 74HC595D pin 11 (shift clock)

  SPI0_CTRLA = SPI_MASTER_bm; // Set SPI to Host (master) mode
  SPI0_CTRLB = SPI_MODE_2_gc | SPI_SSD_bm; // my 74HC595D needs SPI_MODE_2 to work, and I disable the SSD pin
  SPI0_INTCTRL |= SPI_IE_bm;// enable SPI interrupt, so an ISR can trigger if transfer is completed and clear the flag.
  SPI0_CTRLA |= SPI_ENABLE_bm; // Activate the SPI peripheral
  sei();  // enable interrupts
  digitalWriteFast (RESET_SHIFT_REGISTER, LOW);
  delay(1);
  digitalWriteFast (RESET_SHIFT_REGISTER, HIGH);
}

void loop() {
  for (uint8_t i = 0; i < 8; i++) spi_walk(i);
  for (uint8_t i = 6; i > 0; i--) spi_walk(i);
}

void spi_walk(uint8_t n) {
  SPI0_DATA = (1 << n); //This should light LED of the n'th bit
  while ((SPI0_INTFLAGS & SPI_IF_bm) == 0);// Wait for write cycle to be finished
  digitalWriteFast (LATCH_SHIFT_REGISTER, HIGH);   //Toggle latch to copy data to the storage register
  digitalWriteFast (LATCH_SHIFT_REGISTER, LOW);
  delay(100);
}

ISR (SPI0_INT_vect){
// nothing to do here, just to clear the SPI_IF interrupt flag  
}

[EDIT] Got it sort of working on the 412 now, but very unstable. I suspect a HW issue, most likely in my breadboard.

[MX682X]

It will be significantly easier to find the problem when you know what actually happens on the wires. Do you have an Osciloscope at hand to monitor the SPI Lines?

[MX682X]

On the other hand, I think I have a clue: Do not enable SPI interrupts (You are polling for the flag, it is set anyway). Also, you don't clear the SPI interrupt flag in the ISR. New AVRs don't clear the flag automatically upon entering the ISR.

EDIT: Nevermind, The SPI interrupt IS actually reset upon entering the vector, but only in non-buffered mode.... WTF... And can't be cleared by writing a 1 to it?!

But the code SHOULD still work without an Interrupt vector, as there doesn't seem to be a timelimit between reading the INTFLAGS and Accessing the DATA register for Clearing the IF flag

[hmeijdam]

EDIT: Nevermind, The SPI interrupt IS actually reset upon entering the vector, but only in non-buffered mode.... WTF... And can't be cleared by writing a 1 to it?!

But the code SHOULD still work without an Interrupt vector, as there doesn't seem to be a timelimit between reading the INTFLAGS and Accessing the DATA register for Clearing the IF flag

I started without the interrupt and was as surprized as you, about the cumbersome approach of clearing the flag. I wanted to design something, that after writing to the SPI register, I would not have to wait for the transfer to complete, but when I moved the waitloop, to just before writing to the SPI datafield, my code would never startup, as the first time no SPI-write has happened yet so the flag is zero. when entering that condition. That would require another flag to just skip it the first time, but found that a messy way of coding.
Maybe reading the SPI.data field one time for no other purpose than clearing the flag is the nicest approach.

The breadboard with the 412 is behaving nicely now, so no need to get the scope or logic analyzer.

[hmeijdam]

And you are right about SPI working without an ISR. I made a lighter version of the demo sketch.

/* Demo sketch to connect a 74HC595D 8-bit shift register to the hardware SPI of a modern ATTiny
    connect 8 leds (via resistors) to the Qa - Qh pins of the 74HC595D
    connect 74HC595D pin 13 (Output Enable) to GND.
    One led will turn on and keep walking from left to right to left,
    like the Cylons in the old Battlestar Galactica series.
*/
#include <util/delay.h> //do not use standard delay() without setup() and loop().
#define RESET_SHIFT_REGISTER PIN_PA4 //connect to 74HC595D pin 10 (reset) 
#define LATCH_SHIFT_REGISTER PIN_PA2 //connect to 74HC595D pin 12 (Latch clock)

int main (void) {
  // reconfigure CPU clock prescaler
#if (F_CPU == 20000000)
  /* No division on clock */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, 0x00);
#elif (F_CPU == 16000000)
  /* No division on clock */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, 0x00);
#elif (F_CPU == 10000000) // 20MHz prescaled by 2
  /* Clock DIV2 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_2X_gc));
#elif (F_CPU == 8000000) // 16MHz prescaled by 2
  /* Clock DIV2 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_2X_gc));
#elif (F_CPU == 5000000) // 20MHz prescaled by 4
  /* Clock DIV4 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_4X_gc));
#elif (F_CPU == 4000000) // 16MHz prescaled by 4
  /* Clock DIV4 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_4X_gc));
#elif (F_CPU == 2000000) // 16MHz prescaled by 4
  /* Clock DIV4 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_8X_gc));
#elif (F_CPU == 1000000) // 16MHz prescaled by 16
  /* Clock DIV16 */
  _PROTECTED_WRITE(CLKCTRL_MCLKCTRLB, (CLKCTRL_PEN_bm | CLKCTRL_PDIV_16X_gc));
#else
#ifndef F_CPU
#error "F_CPU not defined"
#else
#error "F_CPU defined as an unsupported value for untuned internal oscillator"
#endif
#endif
  // set relevant pins as output
  VPORTA_DIR |= PIN1_bm;  // MOSI pin as output
  VPORTA_DIR |= PIN2_bm;  // LATCH pin as output
  VPORTA_DIR |= PIN3_bm;  // SCK pin as output
  VPORTA_DIR |= PIN4_bm;  // RESET pin as output
  // my 74HC595D needs SPI_MODE_2 to work.
  // disable the SS pin, so it can be used as GPIO pin and cannot accidentaly change SPI to client mode.
  SPI0_CTRLB = SPI_MODE_2_gc | SPI_SSD_bm;
  // Set SPI to Host (master) mode, set (optional) SPI clock prescaler and enable SPI peripheral.
  // SPI0_CTRLA = SPI_MASTER_bm | SPI_PRESC_DIV128_gc | SPI_ENABLE_bm; // slowest SPI speed
  SPI0_CTRLA = SPI_MASTER_bm | SPI_ENABLE_bm | SPI_CLK2X_bm; // fastest SPI speed
  digitalWriteFast (RESET_SHIFT_REGISTER, LOW); // reset/clear the shift register
  digitalWriteFast (RESET_SHIFT_REGISTER, HIGH);
  while (1) {
    for (uint8_t i = 0; i < 8; i++) spi_walk(i);
    for (uint8_t i = 6; i > 0; i--) spi_walk(i);
  }
}
void spi_walk(uint8_t n) {
  SPI0_DATA = (1 << n); //This should light LED of the n'th bit
  while ((SPI0_INTFLAGS & SPI_IF_bm) == 0);// Wait for write cycle to be finished
  digitalWriteFast (LATCH_SHIFT_REGISTER, HIGH);//Toggle latch to copy data to the storage register
  digitalWriteFast (LATCH_SHIFT_REGISTER, LOW);
  _delay_ms(100);
}