cross platform arduino-cli support and platform-io? #466
Replies: 4 comments 10 replies
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I would love to offer that - but I don't have the expertise to write those documents because I don't use those tools. |
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What we have about platformio was written by @MCUdude not myself. The only IDE I use if the arduino IDE. I've used the CLI a few times, but not for over a year since I was using it for automated testing of millis/micros timing. |
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@SpenceKonde Just a fork here what I'm trying to do, starting with arduino-cli support: Next I will try uploading tonight. |
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I would appreciate any help I can get. Imfortunately the recovered drive whrre I have code tjhat sets fuses with the cli automatically is at home, snf I'm visiting parents. |
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Hello @SpenceKonde do you have some time to show/specify how to compile with necessary board and fuses details using arduino-cli i.e. from if I run: So in terminal: ? 🤔 Things I have tried:
The target here is not correct, meaning, it wasn't compiled against the right chip or fuses... And also is the upload parameter correct (programmer I mean)? Like upload speed, PyUPDi etc. from arduino-cli? Some pointers here would be very helpful. 😕 I can then update my documentation and create a pull req that you can merge for those instructions: |
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I had figured all that out a while ago, it was on the harddrive that failed
and that I paid to have restored, but I don't have the code ready at hand;
I completely forget how the upload stuff was handled and might be more
complicated to deal with SerialUPDI (the pyupdi-like upload tool is now
being called SerialUPDI because nobody else on the the project had any
better ideas, but it's not pyupdi (it's based on pymcuprog) but it's been
modified enough that calling it pymcuprog is just not accurate - pymcuprog
uploads 20 times slower, and can use other programmers that I'm sure don't
work anymore but have not even attempted to use. So it needed a name, and
my collaborator couldn't come up with any better ideas, The next release
whiuch will happen any day now, I have been working very hard on it for
weeks should make sure all references to that tool are changed to
SerialUPDI.
FQBN is like atxy7:chip=1607:clock=5internal (and so on - for each menu,
you append ":name-of-menu=name-of-selected-option" ,where those names are
from the boards.txt - the value after (board).menu for that menu, and the
value after that for the option you want.
…On Tue, Jul 20, 2021 at 12:36 PM Saurabh Datta ***@***.***> wrote:
Hello @SpenceKonde <https://github.com/SpenceKonde> do you have some time
to show/specify how to compile with necessary board and fuses details using
arduino-cli
I want to specify chip: ATTINY1607 without optiboot, so the FQBN is
megaTinyCore:megaavr:atxy7
how dow I specify the chip?
And how do I set up the fuses for compiling using arduino-cli?
The fuses details are:
[image: Screenshot 2021-07-21 at 12 04 24 AM]
<https://user-images.githubusercontent.com/4619862/126361274-426ac686-50f5-4d5d-afac-5819cb112a1c.png>
i.e. from boards.txt:
### CLOCK SOURCE
atxy7.menu.clock.5internal=5 MHz internal
### BOD VOLTAGE
atxy7.menu.bodvoltage.1v8=1.8V (5 MHz or less)
### BOD MODE
atxy7.menu.bodmode.disabled=Disabled/Disabled
### EEPROM RETAIN
atxy7.menu.eesave.enable=EEPROM retained
### MILLIS TIMER
atxy7.menu.millis.enabled=Enabled (default timer)
### STARTUP TIME (SUT)
atxy7.menu.startuptime.0=0ms
### UPDI/RESET PIN CONFIGURATION
atxy7.menu.resetpin.UPDI=UPDI (no reset pin)
### VOLTAGE FOR UART BAUD CORRECTION
atxy7.menu.uartvoltage.skip=Ignore (saves flash, almost always fine)
So in terminal: ? 🤔
arduino-cli compile --clean -b <target FQBN for a chip> [TBD specific chip
selection and Fuses setting how to] -v --output-dir ./build/
And also how to specify upload parameters? LIke uplaod speed PyUPDi etc.
from arduino-cli?
Some pointers here would be very helpful. 😕
I can then update my documentation and create a pull req that you can
merge for those instructions:
https://github.com/dattasaurabh82/megaTinyCore/blob/master/Installation.md
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--
____________
Spence Konde
Azzy’S Electronics
New products! Check them out at tindie.com/stores/DrAzzy
GitHub: github.com/SpenceKonde
ATTinyCore <https://github.com/SpenceKonde/ATTinyCore>: Arduino support for
all pre-2016 tinyAVR with >2k flash!
megaTinyCore <https://github.com/SpenceKonde/megaTinyCore>: Arduino support
for all post-2016 tinyAVR parts!
DxCore <https://github.com/SpenceKonde/DxCore>: Arduino support for the AVR
Dx-series parts, the latest and greatest from Microchip!
Contact: ***@***.***
|
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Oh wha the fuck seriiouslt? I responded via email and now I see a vbunch more content. I need to go do work for day job then fibnish up a board design for somerone I will try to circle back this week |
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Didn't understand what you meant by that. 😅 The solution you mentioned for passing in options (I took a look at boards.txt), there is a catch: ERROR: |
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I was respondign from the email, and the blockquoted part where you talked about what had and hadn't worked wasn;t visiubkle in the email so I responded without it. Well. ,I'm gonna have to figure it out pretty soon because I need to specify FQBNs with many options for the CI... |
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If you do so, can you please give me an update here or somewhere else in repo (link here) ? |
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So @SpenceKonde , we figured out the issue: I wrote a fairly detailed guide heer: https://github.com/dattasaurabh82/megaTinyCore/blob/master/Installation.md. You can please use it in your installation guide after testing. 🤓 |
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Thanks - I knew it was something simple like that.... . |
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I have created a pull request with the added information in |
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Thanks - I think I'll put it in another document in Extras, rather than adding more stuff to Installation. Especially since there would be a merge conflict there anyway. I had to almost totally rewrite the manual installation instructions, because it's now a much bigger deal to manually install the core. Arduino7 toolchain version isn't good enough for megaTinyCore (2-series 16k-parts work only in some cases, because things got renamed slightly - and the smaller parts don't work at all) or DxCore (nothing other than the 128k DA-series works at all, and even those have problems, because the io headers it includes are ancient - dating to over a year ago: one of the earliest versions. Hell, it's so old that the DA-series' IO headers contain: /* Multiplication factor select */
typedef enum CLKCTRL_MULFAC_enum
{
CLKCTRL_MULFAC_DISABLE_gc = (0x00<<0), /* PLL is disabled */
CLKCTRL_MULFAC_2x_gc = (0x01<<0), /* 2 x multiplication factor */
CLKCTRL_MULFAC_3x_gc = (0x02<<0), /* 3 x multiplication factor */
CLKCTRL_MULFAC_4x_gc = (0x03<<0), /* 4 x multiplication factor */
} CLKCTRL_MULFAC_t;(per datasheet: "11.3.4 Phase-Locked Loop (PLL) Which of course is a prime example of why you should read both the latest and earliest versions of the io headers. Sometimes you learn secrets you weren't meant to know. Sometimes they're exciting like the fact that there's a secret 4x option for the Dx-series PLL (it works even in combination with the undocumented 32 MHz internal oscillator setting, too, so you can get 12-bit PWM derived from a 128 MHz clock, on a chip spec'ed to run at 24 MHz with a 48 MHz PLL. It got glitchy only when I had the chip at 40, and tried to use 4x multiplier. (I'm convinced the chip was originally intended to go to 32 MHz with 64 MHz PLL, so you'd want the 4x option to get the maximum speed from 16 MHz, which is a standard frequency.... Other times, the information is less fun, like knowing that this was (and almost certainly still is) part of the 2-series: /*
--------------------------------------------------------------------------
NVMBIST - BIST in the NVMCTRL module
--------------------------------------------------------------------------
*/
/* BIST in the NVMCTRL module */
typedef struct NVMBIST_struct
{
register8_t CTRLA; /* Control A */
register8_t ADDRPAT; /* Address pattern */
register8_t DATAPAT; /* Data pattern */
register8_t STATUS; /* Status */
_WORDREGISTER(CNT); /* */
_DWORDREGISTER(END); /* */
register8_t reserved_1[6];
} NVMBIST_t;
/* Address mode select */
typedef enum NVMBIST_AMODE_enum
{
NVMBIST_AMODE_NORMAL_gc = (0x00<<4), /* No special address pattern */
NVMBIST_AMODE_COMPLEMENT_gc = (0x04<<4), /* Post complement address */
} NVMBIST_AMODE_t;
/* Command select */
typedef enum NVMBIST_CMD_enum
{
NVMBIST_CMD_NOCMD_gc = (0x00<<0), /* No effect */
NVMBIST_CMD_START_gc = (0x01<<0), /* Start BIST testing */
NVMBIST_CMD_RESTART_gc = (0x02<<0), /* Re-start BIST testing */
NVMBIST_CMD_BREAK_gc = (0x03<<0), /* Stop BIST and go to BREAK state */
} NVMBIST_CMD_t;
/* Data check pattern select */
typedef enum NVMBIST_PATTERN_enum
{
NVMBIST_PATTERN_ZEROES_gc = (0x00<<0), /* All flash programmed */
NVMBIST_PATTERN_CHECK_gc = (0x01<<0), /* Physical checkerboard in flash */
NVMBIST_PATTERN_INVCHECK_gc = (0x02<<0), /* Inverse physical checkerboard in flash */
NVMBIST_PATTERN_ONES_gc = (0x03<<0), /* All flash unprogrammed */
} NVMBIST_PATTERN_t;
/* FSM State select */
typedef enum NVMBIST_STATE_enum
{
NVMBIST_STATE_IDLE_gc = (0x00<<0), /* Reset state */
NVMBIST_STATE_BREAK_gc = (0x01<<0), /* Break command used */
NVMBIST_STATE_FAILED0_gc = (0x04<<0), /* Test failed, data from last address */
NVMBIST_STATE_FAILED1_gc = (0x05<<0), /* Test failed, data from address-1 */
NVMBIST_STATE_FAILED2_gc = (0x06<<0), /* Test failed, data from address-2 */
NVMBIST_STATE_SUCCESS_gc = (0x07<<0), /* Test success */
NVMBIST_STATE_START0_gc = (0x08<<0), /* Startup, fetching first data */
NVMBIST_STATE_START1_gc = (0x09<<0), /* Startup, fetching second data */
NVMBIST_STATE_RESTART0_gc = (0x0A<<0), /* Re-start from BREAK or FAILED2 */
NVMBIST_STATE_RESTART1_gc = (0x0B<<0), /* Re-start from FAILED1 */
NVMBIST_STATE_RUNNING_gc = (0x0C<<0), /* Test running */
NVMBIST_STATE_FINISH0_gc = (0x0E<<0), /* Check last word */
NVMBIST_STATE_FINISH1_gc = (0x0F<<0), /* Count faults in last word */
} NVMBIST_STATE_t;
/* X address mode select */
typedef enum NVMBIST_XMODE_enum
{
NVMBIST_XMODE_STATIC_gc = (0x00<<0), /* X static */
NVMBIST_XMODE_CARRY_gc = (0x01<<0), /* Carry/borrow from Y */
NVMBIST_XMODE_INC_gc = (0x02<<0), /* X increment each cycle */
NVMBIST_XMODE_DEC_gc = (0x03<<0), /* X decrement each cycle */
} NVMBIST_XMODE_t;
/* Y address mode select */
typedef enum NVMBIST_YMODE_enum
{
NVMBIST_YMODE_STATIC_gc = (0x00<<2), /* Y static */
NVMBIST_YMODE_CARRY_gc = (0x01<<2), /* Carry/borrow from X */
NVMBIST_YMODE_INC_gc = (0x02<<2), /* Y increment each cycle */
NVMBIST_YMODE_DEC_gc = (0x03<<2), /* Y decrement each cycle */
} NVMBIST_YMODE_t;Later on in the datahseet, they tell you the layout of the registers too. (snipped out stuff that has no information). #define NVMBIST (*(NVMBIST_t *) 0x00C0) /* BIST in the NVMCTRL module
/* NVMBIST - BIST in the NVMCTRL module */
/* NVMBIST.CTRLA bit masks and bit positions */
#define NVMBIST_CMD_gm 0x07 /* Command group mask. */
#define NVMBIST_CMD_gp 0 /* Command group position. */
(snip)
#define NVMBIST_SAF_bm 0x08 /* Stop at fault bit mask. */
#define NVMBIST_SAF_bp 3 /* Stop at fault bit position. */
/* NVMBIST.ADDRPAT bit masks and bit positions */
#define NVMBIST_XMODE_gm 0x03 /* X address mode group mask. */
#define NVMBIST_XMODE_gp 0 /* X address mode group position. */
(snip)
#define NVMBIST_YMODE_gm 0x0C /* Y address mode group mask. */
#define NVMBIST_YMODE_gp 2 /* Y address mode group position. */
(snip)
#define NVMBIST_AMODE_gm 0x70 /* Address mode group mask. */
#define NVMBIST_AMODE_gp 4 /* Address mode group position. */
(snip)
/* NVMBIST.DATAPAT bit masks and bit positions */
#define NVMBIST_PATTERN_gm 0x03 /* Data check pattern group mask. */
#define NVMBIST_PATTERN_gp 0 /* Data check pattern group position. */
#define NVMBIST_PATTERN0_bm (1<<0) /* Data check pattern bit 0 mask. */
#define NVMBIST_PATTERN0_bp 0 /* Data check pattern bit 0 position. */
#define NVMBIST_PATTERN1_bm (1<<1) /* Data check pattern bit 1 mask. */
#define NVMBIST_PATTERN1_bp 1 /* Data check pattern bit 1 position. */
/* NVMBIST.STATUS bit masks and bit positions */
#define NVMBIST_STATE_gm 0x0F /* FSM State group mask. */
#define NVMBIST_STATE_gp 0 /* FSM State group position. */
(snip)
#define NVMBIST_STATE3_bp 3 /* FSM State bit 3 position. */
/* NVMBIST.CNT bit masks and bit positions */
#define NVMBIST_CNT_gm 0x7FF /* Faults counter group mask. */
#define NVMBIST_CNT_gp 0 /* Faults counter group position. */
(snip)
#define NVMBIST_CNT10_bp 10 /* Faults counter bit 10 position. */
/* NVMBIST.END bit masks and bit positions */
#define NVMBIST_END_gm 0xFFFFFF /* group mask. */
#define NVMBIST_END_gp 0 /* group position. */
#define NVMBIST_END0_bm (1<<0) /* bit 0 mask. */
(snip)
#define NVMBIST_END23_bp 23 /* bit 23 position. */It's a self-test, if that's not clear I wonder if the 0/1-series parts have the same thing - whether or not it's there, you crack jokes at Microchip's expense. If it isn't on the older ones "Wow, isn't it amazing what you can do if you test your products before you ship?" or if it does have it, "Well, that would explain why the NVM controller is the only peripheral without any errata...." confused? The 1-series in particular, ah, it had a bug or two. The Dx-series silicon bugs were slightly fewer in number, but the ones they have are much worse IMO. I have only run into one relevant errata on a classic AVR (the buggy pin on the 1634 and 828 that pulls low unless the WDT is enabled, and I'm aware of another regarding clock switching on the 167/87, where when you told it to switch to a crystal, you had to immediately write the drive strength, because that setting got lost or something). I tripped over three errata in the DA-series within the first hour |
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As far as I know platform.io has support for the mega-tiny-core. It's a bit spread out. What would be nice is to also have a small section dedicated to explain how to use custom fuses etc., side by side compared to Arduino IDE's Tools column for clear and easy explanation & documentation / guidance.
Same goes for arduino-cli
I know I'm asking too much but I feel it will help the repo a lot.
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