diff --git a/megaavr/boards.txt b/megaavr/boards.txt index b6b3d157..4c50f860 100644 --- a/megaavr/boards.txt +++ b/megaavr/boards.txt @@ -9,11 +9,11 @@ # # # #### ### # # ## ### # # # ##### ### # # #### # #________________________________________________________________________# # # -# Copyright Spence Konde and other ## ### ### # -# contributors 2018-2021 # # # # # # -# megaTinyCore is free software. # # # #### #### # -# (LGPL v2.1) see LICENSE.md and # # # ## # # ## # # -# License section of README.md # #### ## ### ## ### # +# Copyright Spence Konde and other ## ### # ### # +# contributors 2018-2021 # # # ## # # # +# megaTinyCore is free software. # # # #### # # # # +# (LGPL v2.1) see LICENSE.md and # # # ## # # ## # # # # +# License section of README.md # #### ## ### ## ### ### # #________________________________________________________________________# # # # Now reformatted for easy navigation with text editing tools which # @@ -595,7 +595,26 @@ atxy7.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atxy7.menu.attach.allenabled=On all pins, new implementation. atxy7.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL -atxy7.menu.attach.manual=Only enabled ports +atxy7.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atxy7.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atxy7.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atxy7.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atxy7.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atxy7.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atxy7.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy7.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy7.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atxy7.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atxy7.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atxy7.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atxy7.menu.attach.portaonly.build.attachabr=.aA +atxy7.menu.attach.portbonly.build.attachabr=.aB +atxy7.menu.attach.portconly.build.attachabr=.aC +atxy7.menu.attach.portabonly.build.attachabr=.aAB +atxy7.menu.attach.portbconly.build.attachabr=.aBC +atxy7.menu.attach.portcaonly.build.attachabr=.aAC +atxy7.menu.attach.manual.build.attachabr=.aMan +atxy7.menu.attach.oldversion.build.attachabr=.aOld +atxy7.menu.attach.manual=I will enable them manually per docs atxy7.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy7.menu.attach.oldversion=Old version, may fix bugs. atxy7.menu.attach.oldversion.build.attachmode=-DCORE_ATTACH_OLD @@ -952,7 +971,7 @@ atxy6.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy6.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy6.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy6.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy6.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy6.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy6.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy6.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy6.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -1115,6 +1134,23 @@ atxy6.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atxy6.menu.attach.allenabled=On all pins, with new implementation. atxy6.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atxy6.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atxy6.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atxy6.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atxy6.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atxy6.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atxy6.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atxy6.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy6.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy6.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atxy6.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atxy6.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atxy6.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atxy6.menu.attach.portaonly.build.attachabr=.aA +atxy6.menu.attach.portbonly.build.attachabr=.aB +atxy6.menu.attach.portconly.build.attachabr=.aC +atxy6.menu.attach.portabonly.build.attachabr=.aAB +atxy6.menu.attach.portbconly.build.attachabr=.aBC +atxy6.menu.attach.portcaonly.build.attachabr=.aAC atxy6.menu.attach.manual=Only enabled ports atxy6.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy6.menu.attach.oldversion=Old version, (may fix bugs) @@ -1474,7 +1510,7 @@ atxy4.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy4.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy4.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy4.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy4.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy4.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy4.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy4.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy4.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -1603,6 +1639,11 @@ atxy4.menu.PWMmux.I3.build.pwmabr=I3 #________________________________________# atxy4.menu.attach.allenabled=On all pins, with new implementation. atxy4.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atxy4.menu.attach.portaonly=New impl, Port A only - Port B can have manually defined ints +atxy4.menu.attach.portbonly=New impl, Port B only - Port A can have manually defined ints atxy4.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy4.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy4.menu.attach.portaonly.build.attachabr=.aA +atxy4.menu.attach.portbonly.build.attachabr=.aB atxy4.menu.attach.manual=Only enabled ports atxy4.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy4.menu.attach.oldversion=Old version, (may fix bugs) @@ -1911,7 +1952,7 @@ atxy2.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy2.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy2.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy2.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy2.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy2.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy2.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy2.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy2.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -2335,7 +2376,7 @@ microchip.menu.bodmode.enabled.bootloader.bodmodebits=00101 microchip.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 microchip.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 microchip.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -microchip.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +microchip.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 microchip.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 microchip.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 microchip.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -2767,7 +2808,7 @@ atxy7o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy7o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy7o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy7o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy7o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy7o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy7o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy7o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy7o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -2976,6 +3017,23 @@ atxy7o.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atxy7o.menu.attach.allenabled=On all pins, with new implementation. atxy7o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atxy7o.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atxy7o.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atxy7o.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atxy7o.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atxy7o.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atxy7o.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atxy7o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy7o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy7o.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atxy7o.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atxy7o.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atxy7o.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atxy7o.menu.attach.portaonly.build.attachabr=.aA +atxy7o.menu.attach.portbonly.build.attachabr=.aB +atxy7o.menu.attach.portconly.build.attachabr=.aC +atxy7o.menu.attach.portabonly.build.attachabr=.aAB +atxy7o.menu.attach.portbconly.build.attachabr=.aBC +atxy7o.menu.attach.portcaonly.build.attachabr=.aAC atxy7o.menu.attach.manual=Only enabled ports atxy7o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy7o.menu.attach.oldversion=Old version, (may fix bugs) @@ -3258,7 +3316,7 @@ atx27o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atx27o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atx27o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atx27o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atx27o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atx27o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atx27o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atx27o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atx27o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -3408,6 +3466,23 @@ atx27o.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atx27o.menu.attach.allenabled=On all pins, with new implementation. atx27o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atx27o.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atx27o.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atx27o.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atx27o.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atx27o.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atx27o.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atx27o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atx27o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atx27o.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atx27o.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atx27o.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atx27o.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atx27o.menu.attach.portaonly.build.attachabr=.aA +atx27o.menu.attach.portbonly.build.attachabr=.aB +atx27o.menu.attach.portconly.build.attachabr=.aC +atx27o.menu.attach.portabonly.build.attachabr=.aAB +atx27o.menu.attach.portbconly.build.attachabr=.aBC +atx27o.menu.attach.portcaonly.build.attachabr=.aAC atx27o.menu.attach.manual=Only enabled ports atx27o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atx27o.menu.attach.oldversion=Old version, (may fix bugs) @@ -3721,7 +3796,7 @@ atxy6o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy6o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy6o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy6o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy6o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy6o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy6o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy6o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy6o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -3882,6 +3957,23 @@ atxy6o.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atxy6o.menu.attach.allenabled=On all pins, with new implementation. atxy6o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atxy6o.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atxy6o.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atxy6o.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atxy6o.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atxy6o.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atxy6o.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atxy6o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy6o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy6o.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atxy6o.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atxy6o.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atxy6o.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atxy6o.menu.attach.portaonly.build.attachabr=.aA +atxy6o.menu.attach.portbonly.build.attachabr=.aB +atxy6o.menu.attach.portconly.build.attachabr=.aC +atxy6o.menu.attach.portabonly.build.attachabr=.aAB +atxy6o.menu.attach.portbconly.build.attachabr=.aBC +atxy6o.menu.attach.portcaonly.build.attachabr=.aAC atxy6o.menu.attach.manual=Only enabled ports atxy6o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy6o.menu.attach.oldversion=Old version, (may fix bugs) @@ -4163,7 +4255,7 @@ atx26o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atx26o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atx26o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atx26o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atx26o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atx26o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atx26o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atx26o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atx26o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -4304,6 +4396,23 @@ atx26o.menu.PWMmux.SC6.build.pwmabr=SC6 #________________________________________# atx26o.menu.attach.allenabled=On all pins, with new implementation. atx26o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atx26o.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +atx26o.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +atx26o.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +atx26o.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +atx26o.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +atx26o.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints atx26o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atx26o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atx26o.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +atx26o.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +atx26o.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +atx26o.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +atx26o.menu.attach.portaonly.build.attachabr=.aA +atx26o.menu.attach.portbonly.build.attachabr=.aB +atx26o.menu.attach.portconly.build.attachabr=.aC +atx26o.menu.attach.portabonly.build.attachabr=.aAB +atx26o.menu.attach.portbconly.build.attachabr=.aBC +atx26o.menu.attach.portcaonly.build.attachabr=.aAC atx26o.menu.attach.manual=Only enabled ports atx26o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atx26o.menu.attach.oldversion=Old version, (may fix bugs) @@ -4624,7 +4733,7 @@ atxy4o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy4o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy4o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy4o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy4o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy4o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy4o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy4o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy4o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -4753,6 +4862,11 @@ atxy4o.menu.PWMmux.I3.build.pwmabr=I3 #________________________________________# atxy4o.menu.attach.allenabled=On all pins, with new implementation. atxy4o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atxy4o.menu.attach.portaonly=New impl, Port A only - Port B can have manually defined ints +atxy4o.menu.attach.portbonly=New impl, Port B only - Port A can have manually defined ints atxy4o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atxy4o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atxy4o.menu.attach.portaonly.build.attachabr=.aA +atxy4o.menu.attach.portbonly.build.attachabr=.aB atxy4o.menu.attach.manual=Only enabled ports atxy4o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atxy4o.menu.attach.oldversion=Old version, (may fix bugs) @@ -5035,7 +5149,7 @@ atx24o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atx24o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atx24o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atx24o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atx24o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atx24o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atx24o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atx24o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atx24o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -5158,6 +5272,11 @@ atx24o.menu.PWMmux.I3.build.pwmabr=I3 #________________________________________# atx24o.menu.attach.allenabled=On all pins, with new implementation. atx24o.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +atx24o.menu.attach.portaonly=New impl, Port A only - Port B can have manually defined ints +atx24o.menu.attach.portbonly=New impl, Port B only - Port A can have manually defined ints atx24o.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +atx24o.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +atx24o.menu.attach.portaonly.build.attachabr=.aA +atx24o.menu.attach.portbonly.build.attachabr=.aB atx24o.menu.attach.manual=Only enabled ports atx24o.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE atx24o.menu.attach.oldversion=Old version, (may fix bugs) @@ -5448,7 +5567,7 @@ atxy2o.menu.bodmode.enabled.bootloader.bodmodebits=00101 atxy2o.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 atxy2o.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 atxy2o.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -atxy2o.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +atxy2o.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 atxy2o.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 atxy2o.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 atxy2o.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -5833,7 +5952,7 @@ microchipo.menu.bodmode.enabled.bootloader.bodmodebits=00101 microchipo.menu.bodmode.ensampfast.bootloader.bodmodebits=00110 microchipo.menu.bodmode.ensampslow.bootloader.bodmodebits=10110 microchipo.menu.bodmode.sampledfast.bootloader.bodmodebits=01010 -microchipo.menu.bodmode.sampledlow.bootloader.bodmodebits=11010 +microchipo.menu.bodmode.sampledslow.bootloader.bodmodebits=11010 microchipo.menu.bodmode.sampdisfast.bootloader.bodmodebits=01000 microchipo.menu.bodmode.sampdisslow.bootloader.bodmodebits=11000 microchipo.menu.bodmode.endisholdwake.bootloader.bodmodebits=01100 @@ -5931,6 +6050,23 @@ microchipo.menu.printf.minimal.build.printfabr=.pfM #________________________________________# microchipo.menu.attach.allenabled=On all pins, with new implementation. microchipo.menu.attach.allenabled.build.attachmode=-DCORE_ATTACH_ALL +microchipo.menu.attach.portaonly=New impl, Port A only - Ports B and C can have manually defined ints +microchipo.menu.attach.portbonly=New impl, Port B only - Ports A and C can have manually defined ints +microchipo.menu.attach.portconly=New impl, Port C only - Ports A and B can have manually defined ints +microchipo.menu.attach.portabonly=New impl, Port A, B only - Port C can have manually defined ints +microchipo.menu.attach.portbconly=New impl, Port B, C only - Port A can have manually defined ints +microchipo.menu.attach.portcaonly=New impl, Port A, C only - Port B can have manually defined ints microchipo.menu.attach.portaonly.build.attachmode=-DCORE_ATTACH_SOME=0x01 +microchipo.menu.attach.portbonly.build.attachmode=-DCORE_ATTACH_SOME=0x02 +microchipo.menu.attach.portconly.build.attachmode=-DCORE_ATTACH_SOME=0x04 +microchipo.menu.attach.portabonly.build.attachmode=-DCORE_ATTACH_SOME=0x03 +microchipo.menu.attach.portbconly.build.attachmode=-DCORE_ATTACH_SOME=0x06 +microchipo.menu.attach.portcaonly.build.attachmode=-DCORE_ATTACH_SOME=0x05 +microchipo.menu.attach.portaonly.build.attachabr=.aA +microchipo.menu.attach.portbonly.build.attachabr=.aB +microchipo.menu.attach.portconly.build.attachabr=.aC +microchipo.menu.attach.portabonly.build.attachabr=.aAB +microchipo.menu.attach.portbconly.build.attachabr=.aBC +microchipo.menu.attach.portcaonly.build.attachabr=.aAC microchipo.menu.attach.manual=Only enabled ports microchipo.menu.attach.manual.build.attachmode=-DCORE_ATTACH_NONE microchipo.menu.attach.oldversion=Old version, (may fix bugs) diff --git a/megaavr/cores/megatinycore/core_devices.h b/megaavr/cores/megatinycore/core_devices.h index 35fd4018..27c2fd1c 100644 --- a/megaavr/cores/megatinycore/core_devices.h +++ b/megaavr/cores/megatinycore/core_devices.h @@ -777,7 +777,87 @@ int8_t _setPrescale(int8_t prescale) { * I'm sure everyone is grateful for the fact that the folks designing the Dx-series have their * heads screwed on properly and realized that 4 GPIOR-- excuse me, GPRs, 4 awkward VPORTs and * 12 unused addresses in the low I/O space was maybe not the best design decision made in the - * xmega line, and decided that wasn't a winning formula */ + * xmega line. With any parts that would have more than 64 physical pins (56 I/O pins, 7 ports) + * far in the future, and no clear need for more than 4 GPRs, this was the obvious choice. + * When they do eventually release a modern successor to the 2560, they'll need to decide how + * to deal with this, or do what they did on the 2560 itself, which was nothing: They ran out + * of low I/O there, and don't even remark on it in the datasheet, that some of the ports are + * in low I/O and fast, and others are in extended I/O and slow. + * + * It's worth thinking about an odd anticoincidence here: On the classic AVRs, address 0x0000 + * in the dataspace (ie, where a null pointer points) was R0. That's harmless to smash with an + * 8-bit value, but if you write a word there, the second write would shit on zero_reg and then + * adding 1 and 1 could yield numbers other than 2. 0x0001 + 0x01 could be as high as 65282 if + * you've trashed the zero_reg (to add a byte to a word, the compiler uses add on the low bytes + * then needs to use adc (add with carry) to get the carry bit into the high byte, so it does + * adc %B0, r1 + * assuming that r1 is 0, as it is required to be. (under the hood, though there are times that + * r1 has a special meaning to the hardware, the only times these are manifest is when executing + * inline asm; the compiler will never generate the sequences of instructions that do this on + * it's own - once you dig enough, you find that somewhere in the dark recesses of avr-libc is + * an asm macro that actually executes the instructions that explicitly use r1 (multiplication + * is the big one, the high byte of the product always goes in r1. I think the only other is + * SPM on some hardware, and again, in those cases either there's no hw support (modern) or it's + * asm macros in boot.h). In all cases, if r1 is changed, it must be rezeroed before returning to + * c. Otherwise, it'll break everything. Thus, on classic AVRs you could write a null pointer and + * probably not see any sign of that if you wrote one byte, if you wrote a 2 byte one, the worls + * would crash down around you. + * On the modern AVRs, address 0x0000 is VPORTA.OUT, so the first thing you'd trash if you wrote + * to a null pointer is the PORTA configuration. BUT had they put the GPIOR's first - like xmega + * then writing the null pointer would have first trashed a byte or bytes that most applications + * don't even use - but which would also naturally be a perfect probe of whether the bizzare bug + * you're trying to sort out is caused by following a null pointer somewhere or by something else. + * Not that that's a super-common bug. 99 times out of 10 those sorts of "everything is totally + * confused" bugs happen when you return from a function that has overflowed the bounds of a + * local array. The array, probably the only thing on the stack associated with this call other + * than the return address, is going to end up right next to the array. Thus, the first thing you + * trash when you overflow the array in that direction (which one that is depends on details - it + * could end up between two return addresses, too, so overflowing it one way makes it blow up at + * the return from this function, and overflowing the other way it causes it to blow up when the + * calling function returns. Either way, it returns to someplace totally different than where it + * was called from, and then trundles along the code, executing code that thinks registers have + * different data in them than they do and jumping off into some other remote corner of the + * program every time they hit a 'ret'. 0xFFFF (empty flash) is treated as 'sbrs r31, 7', 0xFFF7 + * Usually it will pretty quickly end up at a point where it's either returning to 0 or has run + * off the end of the flash, which wraps around. If the sbrs skips 0x0000, it will land on the + * next vector, but since we don't use the NMI vector ever (cause it can't do anything useful), + * that is just a jump to badisr, which jumps to 0, so unless execution stumbles upon a stable + * loop and hangs while misbehaving, it's likely to end up at the reset vector, without a reset. + * That starts the chip up in guaranteed-not-to-work mode, which we detect and software-reset + * in response to. + * Calling a null pointer or a bogus function pointer has the same effect, as does enabling and + * triggering an ISR that isn't defined. On classic AVR, these dirty resets would instead reset + * into more of a "not-*guaranteed*-not-to-work-but-highly-unlikely-to" mode. Both would often + * show the pattern of working -aack-> executes zero or more sections of incorrect code -> "dirty" + * reset -> hang or abnormal very tight loop shortly after startup. + * + * Those three ways of getting a dirty reset are more common (each one is, on it's own, more + * common) than instances of null pointers being written to. I don't fault them on the design + * and it actually is much easier that VPORTA = *0x0000 than *0x0004, for sure. This does however + * demonstrate how the architecture of the ISA controls how readily various flavors of undefined- + * -but-unquestionably-broken behavior manifest; the dirty reset may actually work on classic AVR + * for your program, as a normal reset, whereas it will never work correctly after a dirty reset + * on modern AVR, except that the core traps it. I think it would be nice if this were documented + * explicitly, rather than relying on the reader to combine AVR CPU, CPUINT and RSTCTRL chapters + * (and less-than-well documented avr-libc behaviors) to conclude that they should always check the + * reset cause flags, and if they do that, they must clear them or they won't know which source, if + * any caused the reset if one occurs, and that ending up restarting the code without a hardware + * reset occurring is a "can't happen" that can happen if your c code is bad enough. From there, + * having read the chapters on the other peripherals you are using you'd no doubt have found some + * reason your initialization couldn't be done over again exactly the same way without a reset. + * Hence in your init code you need to check and clear reset flags if you find them, or software + * reset if you find nothing. I think that's asking a lot of the developer, even outside arduino + * land. + * + * Losing the memory mapping of working registers is a Good Thing; they never should have been + * made accessible like that. You don't know what's in which registers, and all you're going to + * get trying is undefined behavior. If you need to specify registers by number, you should be + * writing inline asm, not fucking with the registers from C. The only *capability* they got from + * the mess that couldn't be done normally is indirect access via pointer registers, which is + * an almos if + * + */ + #if !defined(GPIOR0) #define GPIOR0 (_SFR_MEM8(0x001C)) #define GPIOR1 (_SFR_MEM8(0x001D))